Multilayered printed circuit boards, including those referred to as of the high density variety, are typically constructed of several electrically conductive layers separated by layers of dielectric material. Some of the conductive layers may be utilized as power and ground planes while other conductive layers may be patterned for electrical signal connections (e.g. between integrated circuit chips). Layer-to-layer interconnections may be used in such constructions and accomplished using what is referred to as plated-through-holes (PTH's), such holes typically including a plating of electrically conductive material (e.g., copper) thereon. In those situations wherein electrical interconnections are desired between adjacent conducting layers, it has been common in the art to provide such connections with what are often referred to as "vias". These hole-type connections, though typically not extending through the entirety of the board's thickness, are also coated (e.g., plated) with an internal conductive layer (e.g., copper). Such "vias" and through-holes are typically provided by drilling.
The term "through-hole" as used herein is meant to include the aforementioned PTH's as well as "vias" that may only interconnect selected conductive layers in the final structure (and thus possibly be only internally positioned).
Examples of various types of multilayered printed circuit board (PCB) constructions are defined in U.S. Pat. No. 4,030,190 (K. Varker), U.S. Pat. No. 4,554,405 (K. Varker), U.S. Pat. No. 4,854,038 (J. Wiley), U.S. Pat. No. 4,864,772 (D. Lazzarini et al.), U.S. Pat. No. 4,868,350 (J. Hoffarth et al.) and U.S. Pat. No. 5,191,174 (C. S. Chang). All of these patents are assigned to the same assignee as the instant invention. Additional examples, including those which describe various steps in producing such final composite structures, are shown in U.S. Pat. No. 4,803,450 (J. Burgess), U.S. Pat. No. 5,046,238 (R. Daigle) and German Patent DE3316017 (M. Bergmann).
As defined in the above and other patents, and as is also well known in the art, such multilayered printed circuit board constructions typically utilize copper or a similar highly conductive material for the signal and/or power and/or ground conductive planes. The term "printed circuit board" as used herein is thus meant to define a structure including at least one dielectric layer and at least one conductive layer located therein and/or thereon. One well known example of a dielectric material for use in such construction is fiberglass reinforced epoxy resin (aka FR4). Other materials may include polyimide and polytetrafluoroethylene (PTFE), the latter of more recent vintage when relatively low dielectric materials are desired. As will be understood from the following, the teachings of the present invention are especially adaptable to multilayered PCB's wherein PTFE or the like is used as the dielectric material and copper is used as the conductive (metal) material for the various through-holes and conductive layers used therewith.
As defined herein, the present invention comprises a method of making a multilayered circuit board construction comprised of individual layered subassemblies each including electrically conductive wiring and at least one through-hole therein. The resulting multilayered structure as defined herein is characterized by the provision of at least two of these subassemblies being bonded together such that respective through-holes of each are aligned, engaged, and coupled through formation of a metallurgical bond at the through-hole jointure. Such a bond is achieved through the unique use of heat and pressure, and precise quantities of selected metals (e.g., gold and tin) in the jointure location. Significantly, the through-holes are of a pre-established configuration with precisely defined (in thickness) sidewalls that, uniquely, allow at least partial compression (collapse) of the sidewalls during pressure application at a designated temperature. Such compression, possible by several such paired through-hole combinations, assures effective engagement therebetween so that sound electrical connection is made possible across the entire final PCB structure.
Still further, the method defined herein results in formation of the aforementioned metallurgical bond while also, uniquely, providing a resulting alloy at the through-hole jointure that possesses a melting point much greater than that of the initial eutectic alloy formed. Most significantly, this new melting point is also greater than the corresponding melting point of the dielectric materials (e.g., PTFE) used in each layered subassembly being so bonded. This unique result enables subsequent heating of the initially bonded subassemblies to an elevated temperature above the dielectric's melting point, resulting in dielectric flow as desired. Because the formed alloy remains in the solid state during such dielectric flow, the heated dielectric material is prevented from migrating or otherwise moving into the through-hole jointure and thereby possibly adversely affecting the electrical connection formed at this location.
The present invention thus represents an improvement over the process defined in Ser. No. 5,280,414, as well as those processes mentioned in U.S. Pat. Nos. 4,803,450 and 5,046,238 and German patent DE3316017, and is thereby deemed to constitute a significant advancement in the art.